1. Field of the Invention
The invention relates to a method of fabricating a memory.
2. Description of Related Art
The dimension of a flash memory is gradually reduced. Therefore, in order to resolve the issue of the decreasing line width and prevent misalignment of the contacts, a self-aligned contact (SAC) process and a self-aligned floating gate (SAF) process are performed in a memory region of the flash memory.
When the SAC process or the SAF process is performed in the memory region of an exemplary flash memory, the SAC process or the SAF process is likely to complicate the entire manufacturing process performed in the peripheral region, and the SAC process or the SAF process may contain thermal processes. Thereby, characteristics of devices in the peripheral region may be deteriorated. For instance, the characteristics of gates may be impaired, or boron penetration may occur in a gate oxide layer. Temperature and other parameters of the thermal process thus need to be adjusted. Namely, in consideration of the characteristics of devices in the peripheral region, the favorable conditions of performing the manufacturing process on the devices in the memory region may be compromised. As such, the device characteristics of the memory cannot be further improved.